The present invention relates to a thin film transistor device.
Mainly high-temperature poly-Si has been used for a base thin film being employed for forming a thin film transistor (TFT: Abbreviation of Thin Film Transistor) used conventionally for the thin film transistor device, mainly for an image display device.
This means that poly-crystalline Si is formed on a quartz substrate being an insulator substrate by a high-temperature annealing process at temperature of below or above 900xc2x0 C., and that the poly-crystalline Si of comparatively large grain size (500-600 nm) is formed. A TFT formed on this high-temperature poly-Si thin film utilizes a Si thin film having a low density in grain boundary thereof and excellent crystallinity, as a channel, field effect mobility of electron of the TFT of 100-150 [cm2/Vs] which is a value close to that (xcx9c500 [cm2/Vs], S. M. Sze, Physics of Semiconductor Devices, P. 29, Second Edition, Wiley) of single crystalline Si, can be obtained.
However, the high-temperature poly-Si thin film is necessitated to use an expensive quartz substrate capable of withstanding a high temperature process as the insulator substrate, since this cost of substrate has been the main cause of difficulty in a cost reduction of entire device, generalization of use of the TFT has been restricted.
Of late, in place of the high-temperature poly-Si thin film, research in a low-temperature poly-Si thin film has actively been carried out. This is a poly-crystalline Si thin film crystallized an amorphous Si thin film formed on a low cost glass substrate or a plastic substrate by a plasma CVD method or the like utilizing a zone melting recrystallization method such as excimer laser annealing.
With the use of this method, since the poly-crystalline Si thin film is capable of being formed at low temperature(xcx9c150xc2x0 C.) , there is an advantage that remarkably inexpensive TFT can be formed. However, compared with the high-temperature poly-Si thin film, the low-temperature poly-Si thin film can form only the poly-crystalline Si thin film with small grain size and a random crystal orientation.
Since when crystal grain size is small, a density in a grain boundary thereof existing in a current path becomes large, or when a crystal orientation is random, a trapping state density in grain boundary becomes relatively large, in both cases any way, characteristics of a transistor are worsend.
Owing to this, in a TFT as a product, using a conventional low-temperature poly-Si thin film as an elemental material, field effect mobility thereof is restricted to an extent up to 150[cm2/Vs]. With such small mobility, since an element cannot reach speed practically necessitated, there is such a drawback that sorts of element to be formed on the same glass (or plastic) substrate are restricted.
For example, such an inconvenience is generated that in a case of an image display device, a pixel matrix can be formed on a glass (or plastic) substrate, whereas the circuits such as a source driver, a gate driver, a shift register, a peripheral controller are formed on a conventional printed circuit board, the former must be connected to the board with a cable terminal. With such a method, there has been such drawbacks as that in addition to smallness (4 in.-10 in.) in screen size, an increase in cost of entire device are brought about.
In order to improve drawbacks as described above, arts for an increase in crystal grain size and for truing up a position of crystal grain and a crystal orientation are necessitated. So far, various arts has been proposed in order to form a low-temperature poly-Si thin film into large sizing and for controlling a position and a crystal orientation of crystal grain.
An art for forming poly-crystalline Si thin film having a [111] axis in a current moving direction by introducing a metal element for selectively promoting an amorphous Si-thin film formed on the insulated substrate for crystallization and by carrying out crystal growth in a direction parallel to the substrate (for example, Japanese Unexamined Patent Publication H 7-321339), an art for forming rectangular-shaped poly-crystalline Si thin film having a  less than 100 greater than  axis in a direction perpendicular to the substrate and a {220} surface in parallel (or 45xc2x0 C.) to a beam scanning direction by controlling a shape of laser beam for annealing and a scanning rate of annealing position (for example, Japanese Unexamined Patent Publication H 10-41234), and an art for forming a columnar poly-crystalline Si layer trued up a crystal orientation by forming a first poly-crystalline Si layer on a substrate, forming a seed crystal having any one of typical orientation ({100}, {110}, {111}) by an anisotropic etching, and by forming a second polycrystalline Si layer thereon (for example, Japanese Unexamined Patent Publication H 8-55808) and the like. However, in spite of these numerous trials, a TFT having sufficient high mobility has not so far be realized.
In the crystallization method described above, either of them is not a sufficiently completed art, the maximum grain size which can be achieved has been about 2 xcexcm, and the size is not enough. With this value of 2 xcexcm, it is far behind the practical size of about 8 xcexcm of a thin film transistor required for a liquid crystal display panel of large screen, further, dispersion of characteristics between elements due to positional deviation of crystal grains cannot be restrained.
Thereby, with such arts described above, it is not possible to construct a thin film transistor device that can entirely replace the existing thin film transistor device of a low function. This is because these arts can not realize the most stable lattice structure in a Si crystal when it is brought into contact with a substrate, it is an essential limit to be determined by a strain at the interface between Si and a substrate, and not to be depended on a deposition method of thin film or an annealing method.
Accordingly, in order to realize an image displayed device with the high performance and the large area at low cost, an object of the present invention is to realize a TFT having high mobility by providing such arts as that low-temperature poly-Si thin film becoming an elemental material of TFT can be large sized (quasi single-crystal) in a trued up state to a crystal orientation having the most stable lattice structure in consideration of a strain at the interface with the substrate, and that the positions of crystal of the low-temperature poly-Si thin film can be controlled.
In order to achieve the object described above, researchers of a thin film transistor device of the present invention paid attention to a fact that a {110} surface of a crystal composed of either one or their mixed crystal selected from a group of C, Si, Ge, Sn and Pb which are IV group crystal is the surface having smallest dangling bond density, and a high mobility TFT is realized by minimizing strain energy at the substrate interface, and by forming a channel with a crystal grain of large grain size and of controlled crystal orientation obtained through crystal growth by selecting crystal orientation having a growth length equivalent to a channel length.
Hereinafter, characteristic items of a thin film transistor device of the present invention will be specifically enumerated.
(1) This is a thin film transistor device having a insulator substrate, a poly-crystalline thin film formed on the insulated substrate, and a transistor composed of a source, a drain, a channel and a gate formed on the poly-crystalline thin film, and is characterized in that the poly-crystalline thin film is formed from a crystal composed of either one crystal or their mixed crystals selected from a group of C, Si, Ge, Sn and Pb being a IV group crystal, and is formed from one piece or a plurality of pieces of crystal grains having a  less than 110 greater than  axis at an angle of 0-5xc2x0 relative to a direction perpendicular to the substrate, and a  less than 100 greater than  axis at an angle of 0-30xc2x0 relative to path direction is/are ranged along on at least one path connecting the source and the drain described above.
(2) This is thin film transistor device having a insulator substrate, a poly-crystalline thin film formed on the insulated substrate, and a transistor composed of a source, a drain, a channel and a gate formed on the poly-crystalline thin film, and is characterized in that the poly-crystalline thin film is formed from a crystal composed of either one crystal or their mixed crystals selected from a group of C, Si, Ge, Sn and Pb being a IV group crystal, and a plurality pieces of crystal grains having  less than 110 greater than  axes at an angle of 0-5xc2x0 relative to a direction perpendicular to the substrate are ranged along and that mutual  less than 100 greater than  axes of the crystal grains ranged along described above are of uniform value at an angle 0-10xc2x0.
(3) In (1) or (2) described above, the poly-crystalline thin film is characterized in that it is, in particular, a Si thin film, a film thickness thereof is 10 nm-100 nm, and a width of a section in a {100} surface of the crystal grain is, in particular, 300 nm-5 xcexcm.
(4) In (1) or (2), the poly-crystalline thin film is characterized in that it is, in particular, a Si thin film, a film thickness thereof is 10 nm-100 nm, a width of a section in {100} surface of the crystal grain is, in particular, 300 nm-5 xcexcm, and widths among a plurality pieces of crystal grains are substantially of uniform value with one another.
(5) In (1) or (2), the poly-crystalline thin film is characterized in that it is, in particular, a Si thin film, a film thickness thereof is 10 nm-100 nm, a width of a section in {100} surface of the crystal grain is, in particular, 300 nm-5 xcexcm, and widths among a plurality pieces of crystal grains are substantially of uniform value with one another.
(6) In (1) or (2), in either or both of the sources and the drains it is characterized in that a part of the sources (or drains) or in the neighborhood thereof has a micro-crystalline region, an average grain size of the micro-crystalline region is smaller than an average grain size of crystal grains in the channel region, and a crystal orientation thereof is more random orientation than the crystal grain in the channel region described above.
(7) In (1) or (2), it is characterized in that in the neighborhood of side parts in one or both of a channel has/have a micro-crystalline area, average grain size of the micro-crystalline region is smaller than average grain size of a crystal grain in channel region, and crystal orientation thereof is more random orientation than the crystal grain in the channel region.
(8) In (1) or (2), it is characterized in that in the neighborhood of side parts in one or both of the source and the drain has/have a micro-crystalline region, average grain size of the micro-crystalline region is smaller than average grain size of a crystal grain in channel region, and crystal orientation thereof is more random orientation than the crystal grain in the channel region.
(9) This is a thin film transistor device having a insulator substrate, a poly-crystalline thin film formed on the insulated board, and a transistor composed of a source, a drain, a channel and a gate formed on the poly-crystalline thin film, and is characterized in that the poly-crystalline thin film is formed from a crystal composed of either one crystal or their mixed crystals selected from a group of C, Si, Ge, Sn and Pb being a IV group crystal, the channel is formed from only one crystal grain, the crystal grain has a  less than 110 greater than  axis at an angle of 0-5xc2x0 relative to a direction perpendicular to the substrate.
(10) This is a thin film transistor device having a insulator substrate, a poly-crystalline thin film formed on the insulated board, a transistor composed of a source, a drain, a channel and a gate formed on the poly-crystalline thin film, and a circuit having a plurality of transistors integrated thereon, the device is characterized in that when size of transistor in a direction of channel length is set L, size of the transistor in a direction of channel width is set W, the poly-crystalline thin film has micro-crystalline region in at least one direction with an interval of L (or W) times any integer number, an average grain size of the crystal grain in the micro-crystalline region is smaller than an average grain size of the crystal grain in the channel part.
(11) The transistor device as set forth in (1) or (2) is characterized in that a plurality of pieces of them are combined and formed on the same substrate.
According to the present invention having characteristics described above, a TFT with high mobility can be realized in such manners as that strain energy at the substrate interface is minimized by utilizing a {110} surface having smallest dangling bond density of a IV group crystal (crystal composed of either one crystal or mixed crystals of them selected from a group of C, Si, Ge, Sn, and Pb) for joining it with the substrate interface, further a crystal growth can be performed by selecting a crystal orientation having a growth length equivalent to the channel length, and that the channel can be formed by the crystal grain of large grain size and crystal orientation controlled.
As a result, since pixel matrices and peripheral circuits are capable of being intensively formed on the same glass substrate, an image display device of large area (for example 15 inches or more) can be highly integrated.